
- Sponsor
- IQUIST
- Speaker
- Qian Xu, Sherman Fairchild Postdoctoral Fellow, California Institute of Technology
- Contact
- Stephanie Gilmore
- stephg1@illinois.edu
- Phone
- 217-244-9570
- Views
- 14
- Originating Calendar
- IQUIST Seminar Series
"What will future quantum machines look like?
Abstract: Quantum machines promise to solve classically intractable problems, but building useful systems requires a fault-tolerant logical architecture for protecting and processing quantum information. After decades of progress, the field has largely converged on the surface-code architecture, which nevertheless appears fundamentally difficult to scale, with practical applications likely requiring millions of physical qubits. Rather than racing toward ever-larger devices, this talk asks whether we should instead rethink fault-tolerant architectures from first principles, challenging many of the assumptions behind today’s dominant paradigm. I will introduce a new class of high-rate architectures designed to rebuild the core components of a quantum computer in ways that are native to emerging physical platforms with long-range interactions, such as AMO systems. These architectures combine high-rate quantum codes, which dramatically increase information storage density, with high-rate logical operations that enable many logical gates to be executed in parallel. When co-designed with hardware controls, compilation strategies, and algorithmic structure, this approach supports large-scale, fault-tolerant quantum information processing with massive parallelism and low overhead. Together, these ideas offer a path toward reducing hardware requirements to on the order of ten thousand physical qubits or fewer, bringing fault-tolerant quantum machines as powerful scientific instruments within reach of near-term or even existing devices.
Bio: Qian Xu is a Sherman Fairchild Postdoctoral Fellow at Caltech, working on fault-tolerant quantum information science. He received his Ph.D. from the University of Chicago in 2024. His research bridges quantum information theory and quantum hardware development, aiming to develop principles and architectures for large-scale fault-tolerant quantum computers on near-term devices.