Grainger College of Engineering Seminars & Speakers

Advanced electronics and heterogeneous integration, such as HBM and flexible devices, continue to scale down with higher power density, leading to significant thermal challenges.

In 3D-stacked dies, the interconnect layers (e.g., underfill, NCF) become major thermal bottlenecks. As die-to-die spacing decreases and low-thermal-conductivity materials are introduced, interfacial thermal resistance increases and limits heat dissipation. Thermal management has become a huge challenge. However, accurate thermal resistance characterization at interconnect interfaces is essential to understand and optimize heat transport and overcome heat dissipation challenges.

Similarly, in flexible and wearable electronics, ultra-thin silicon is adopted to improve mechanical and device performance with soft substrates. While thinning silicon enhances flexibility, it significantly reduces its thermal conductivity due to increased phonon scattering. This degradation in heat conduction leads to inefficient heat spreading, which can limit transistor performance, reduce reliability, and shorten device lifetime.

Overall, understanding interconnect thermal resistance in 3D die stack devices and ultra-thin silicon films in flexible electronics is critical, which helps to ensure reliability and enable next-generation electronic devices.