CSL General Event Calendar

Graph computations are challenging for programming and performance due to low data-reuse and irregular data.  The UpDown System radically improves both programmability and performance.  UpDown architecture enables fine-grained parallelism: 1-cycle thread creation and management, 1-cycle messages.  And, split-transaction DRAM access unlock the power of HBM’s massive memory bandwidth, under software control.  An expander-based, low-diameter network, combined with in-package optics delivers transformative network performance.  We will describe how UpDown’s KVMSR+UDWeave framework enables high-level programming of fine-grained parallelism.  

UpDown performance on skewed-graph computations is 100x vs multicore CPU’s (single-node), and scales to 1,000 and 10,000-fold speedup on BFS, Pagerank, Triangle Count, K-truss and more.  Comparison to supercomputer and GPU cluster performance shows 1-3 order of magnitude ISO-power performance advantages.  UpDown research is supported by IARPA’s AGILE program.

The UpDown system is being commercialized in a Chicago-based startup.   This startup is doing leading edge hardware design, including HBM and co-packaged optics with the goal of revolutionizing graph analytics, cybersecurity, market intelligence, and perhaps future AI/ML.

Brief Biography

Andrew A Chien is the William Eckhardt Distinguished Service Professor of Computer Science at the University of Chicago and Senior Scientist at Argonne National Laboratories.  He has led the Zero-carbon Cloud project since 2015, and is known for his research on datacenters, renewable energy and sustainability, cloud resource management and software, large-scale system architecture, and graph computing architecture.  Chien is leader of the IARPA funded “UpDown System Project”, designing breakthrough scalable graph analytics systems.  Chien has received numerous recognitions for research.  Dr. Chien currently serves on the NSF CISE Advisory Committee and DARPA ISAT.  He is a Fellow of the ACM, IEEE, and AAAS.  He served as EiC of Communications of the ACM, 2017-2022, and Vice President of Research at Intel Corporation from 2005-2010.  He served as SAIC Chair Professor of University of California, San Diego  (1998-2005) and as faculty at the University of Illinois (1990-98).  He received BS, MS, and PhD degrees from the Massachusetts Institute of Technology.