Vivek Sarkar, Georgia Institute of Technology, "Data Flow Execution Models -- a Third Opinion"

Event Type

Lecture

Sponsor

Illinois Computer Science

Location

2405 Siebel Center

Date

Oct 14, 2019   3:30 - 4:30 pm  

Cost

Free

Contact

Dana Garard

E-Mail

dgarard@illinois.edu

Views

270

Originating Calendar

Computer Science Speakers Calendar

Abstract
Since their introduction five decades ago, data flow execution models have influenced the design of generations of parallel hardware and software with their decentralized approaches to control and data. At the same time, many limitations of the data flow approach have also been identified, especially with respect to the overheads of distributed control and lack of locality management. Some of these limitations were identified in the 1982 paper titled "A Second Opinion on Data Flow Machines and Languages" by Gajski, Padua, Kuck and Kuhn. In this talk, we offer a third opinion on data flow execution models that is influenced by the major disruptions in computing that are emerging with the coming end of Moore's Law. These disruptions include new kinds of heterogenous processors and accelerators, heterogeneous memories, near/in-memory computation structures, and, even non von Neumann computing elements. Our claim is that data flow execution models offer a promising foundation for software and hardware designed for these future "extreme heterogeneity" platforms. To support this claim, we summarize experiences from the Habanero Extreme Scale Software Research Laboratory in which we have shown how a wide range of primitives for parallelism, concurrency, and locality/distribution control can be supported by a unified cooperative runtime system based on data/event-driven scheduling of lightweight tasks that supports heterogeneous processors including CPUs, GPUs, DSPs, FPGAs, and NMPs. Further, we show that the use of data flow execution models can enable strong semantic guarantees for programs that use well defined subsets of these parallel primitives.

Bio
Vivek Sarkar is a Professor in the School of Computer Science, and the Stephen Fleming Chair for Telecommunications in the College of Computing at Georgia Tech. He conducts research in multiple aspects of parallel computing software including programming languages, compilers, runtime systems, and debuggers for parallel and high performance computer systems. Prof. Sarkar currently leads the Habanero Extreme Scale Software Research Laboratory at Georgia Tech, and is co-director of the Center for Research into Novel Computing Hierarchies (CRNCH). He is also the instructor for a 3-course online specialization on Parallel, Concurrent, and Distributed Programming hosted on Coursera. Prior to joining Georgia Tech in 2017, Prof. Sarkar was the E.D. Butcher Chair in Engineering at Rice University, where he created the Habanero Lab, served as Chair of the Department of Computer Science during 2013–2016, and created an undergraduate course on Fundamentals of Parallel Programming (COMP 322). Before joining Rice in 2007, Sarkar was Senior Manager of Programming Technologies at IBM Research. His research projects at IBM included the X10 programming language, the Jikes Research Virtual Machine for the Java language, the ASTI optimizer used in IBM’s XL Fortran product compilers, and the PTRAN automatic parallelization system. Sarkar became a member of the IBM Academy of Technology in 1995, and was inducted as an ACM Fellow in 2008. He has been serving as a member of the US Department of Energy’s Advanced Scientific Computing Advisory Committee (ASCAC) since 2009, and on CRA’s Board of Directors since 2015.