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MRSEC Seminar: Dr. Mark Stiles, NIST "Can spintronics help make computing more efficient?"

Event Type
Illinois MRSEC
280 MRL
Oct 16, 2023   11:00 am  
Originating Calendar
I-MRSEC Big Events

In this talk, I discuss why computer designers look to the brain for inspiration on how to develop novel ways of computing for cognitive tasks, why spintronic devices, particularly magnetic tunnel junctions, might make valuable contributions to this process, and why success requires considering all levels of the computational stack from devices through the architecture. I illustrate these points in terms of three recent computational platforms my colleagues and I have worked on using magnetic tunnel junctions in different ways. One example describes using thermally unstable magnetic tunnel junctions to simulate associative memories. A second example is a complex-valued Hopfield network that we model using magnetic tunnel junctions as spin-torque oscillators. The last example shows experimental results on binary neural networks based on crossbar arrays of magnetic tunnel junctions used as programmable resistors.

Bio: Mark Stiles is a NIST Fellow in the Alternative Computing Group at the National Institute of Standards and Technology. He received a M.S./B.S. in Physics from Yale University, and a Ph.D. degree in Physics from Cornell University. Following postdoctoral research at AT&T Bell Laboratories, he joined the research staff at NIST. Mark's research has focused on the development of a variety of theoretical methods for predicting the properties of magnetic nanostructures and has recently shifted to alternative computing. He has helped organize numerous conferences, has served the American Physical Society on various committees, and has served on the editorial boards of several Physical Review journals. Mark is a Fellow of the American Physical Society and IEEE.

Visit contact: Axel Hoffmann (


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