To fulfill the promises of wide band-gap (WBG) power transistors, circuit parasitics arising from the interconnection of these devices must be reduced through careful layout. While prior work has demonstrated guidelines for lateral, single-sided PCB layouts for half-bridges, this work presents the potential improvement in vertical, dual-sided designs by leveraging an electrically thin approach. Though results are discussed specifically in the context of integrated switching cells (ISC) for flying capacitor multilevel converters (FCML), this technique can also be applied to other topologies to similarly improve high frequency operation. The presentation’s second part discusses in detail the methodology and demonstrates its application to investigate PCB design influence on converter performance. Specifically, we examine step-by-step applicatios to example design flow from ECAD (KiCAD) to 3D MCAD (SolidWorks) to FEA (Ansys Q3D) to multiphysics/circuit simulation (Simplorer) and indicate the effective utilization of the methodology with the various simulation packages.