For single-phase dc-ac and ac-dc conversion, energy decoupling is needed to compensate for the instantaneous power mismatch between the ac and the dc sides. The series-stack buffer (SSB) is an active energy-decoupling buffer that allows a large voltage ripple on the energy storage capacitor to improve the energy utilization ratio, with the actively regulation of the dc-bus voltage to ensure minimal ripple. The SSB architecture has been demonstrated to attain high efficiency, high power density and excellent ripple control on the dc-bus. This talk presents a set of design constraints for the SSB that specify the relation among the passive components and the load power level. We propose a non-linear-programming-based scheme is also proposed to solve the resulting constrained optimization problem. The optimization results promise a smaller and lower-cost solution than those of earlier efforts on SSB.