Next-generation real-time embedded systems will rely on high-performance system-on-a-chip platforms to satisfy demanding performance requirements within a limited power envelope. Such platforms comprise multiple, heterogeneous processing elements connected by a complex memory hierarchy. Careful management of both on-chip and off-chip resources is key to guarantee tight worst-case bounds, as required by real-time applications, without sacrificing parallelism and performance. Lately, the PRedictable Execution Model (PREM) has gathered significant attention in the real-time community for its ability to deterministically resolve contention for access to shared resources at the scheduling level, enforcing a clean separation between computation and data transfers. In this talk, we first review PREM and survey implemented hardware/software platforms based on the model. We then focus on the key problem of code transformation, and present an overview of techniques aimed at automatically compiling well-structured programs to PREM. We discuss how the approach can be applied to both sequential and parallel programs, and further present a set of open questions and future directions.
Rodolfo Pellizzoni is Associate Professor in the Department of Electrical and Computer Engineering at the University of Waterloo. He received his master degree from Scuola Superiore Sant'Anna in 2005 and his PhD from the University of Illinois at Urbana-Champaign in 2010. Rodolfo's main research interests are in real-time systems and timing analysis, with a particular focus on hardware/software architectures for timing predictability and safety certification.
FACULTY HOST: Sibin Mohan