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IEEE CEDA Central Illinois Chapter Distinguished Lecture Series featuring Dr. Naresh Shanbhag on Bringing Artificial Intelligence to the Edge – A Shannon-inspired Approach

Event Type
Seminar/Symposium
Sponsor
IEEE CEDA Central Illinois Chapter
Location
B02 CSL
Date
Apr 26, 2018   3:00 pm  
Speaker
Dr. Naresh Shanbhag, Jack Kilby Professor of Electrical and Computer Engineering
Views
1
Originating Calendar
ECE ILLINOIS Calendar

TITLE | Bringing Artificial Intelligence to the Edge – A Shannon-inspired Approach

ABSTRACT | Much of AI today is deployed in the Cloud primarily due to the high complexity of machine learning algorithms. Realizing inference functionality on sensory Edge devices requires one to find ways to operate at the other edge, i.e., at the limits of energy efficiency, latency, and accuracy, in nanoscale semiconductor technologies. This talk will describe the Shannon-inspired statistical computing framework developed by researchers in the SONIC Center (2013-17), to accomplish this objective. This framework comprises low signal-to-noise ratio (SNR) circuit fabrics (the channel) with engineered error statistics, coupled with efficient techniques to compensate for computational errors (encoder and decoder). A low SNR circuit fabric referred to as deep in-memory architecture (DIMA) will be described. DIMA breaches the long-standing “memory wall” in von Neumann architectures by embedding analog computations in the periphery of the memory array (see https://spectrum.ieee.org/computing/hardware/to-speed-up-ai-mix-memory-and-processing) thereby achieving >100X energy-delay-product gains in laboratory prototypes over custom digital architectures implementing the same inference function. The strong systems-to-devices connection inherent in Shannon-inspired statistical computing creates an opportunity for researchers in machine learning, computer architecture, integrated circuits, and nanoscale devices, to work together to design intelligent machines of the future. The talk will end with a discussion of future directions.

BIO | Naresh R. Shanbhag is the Jack Kilby Professor of Electrical and Computer Engineering at the University of Illinois at Urbana-Champaign. He received his Ph.D. degree from the University of Minnesota (1993) in Electrical Engineering. From 1993 to 1995, he worked at AT&T Bell Laboratories at Murray Hill where he led the design of high-speed transceiver chip-sets for very high-speed digital subscriber line (VDSL), before joining the University of Illinois at Urbana-Champaign in August 1995. He has held visiting faculty appointments at the National Taiwan University (Aug.-Dec. 2007) and Stanford University (Aug.-Dec. 2014). His research interests are in the design of energy-efficient integrated circuits and systems for communications, signal processing and machine learning. He has more than 200 publications in this area and holds thirteen US patents.

Dr. Shanbhag received the 2010 Richard Newton GSRC Industrial Impact Award, became an IEEE Fellow in 2006, received the 2006 IEEE Journal of Solid-State Circuits Best Paper Award, the 2001 IEEE Transactions on VLSI Best Paper Award, the 1999 IEEE Leon K. Kirchmayer Best Paper Award, the 1999 Xerox Faculty Award, the IEEE Circuits and Systems Society Distinguished Lecturership in 1997, the National Science Foundation CAREER Award in 1996, and the 1994 Darlington Best Paper Award from the IEEE Circuits and Systems Society. In 2000, Dr. Shanbhag co-founded and served as the Chief Technology Officer of Intersymbol Communications, Inc., (acquired in 2007 by Finisar Corp (NASDAQ:FNSR)) a semiconductor start-up that provided DSP-enhanced mixed-signal ICs for electronic dispersion compensation of OC-192 optical links. From 2013-17, he was the Director of the Systems On Nanoscale Information fabriCs (SONIC) Center, a 5-year multi-university center funded by DARPA and SRC under the STARnet program.

Hosted by Deming Chen, ECE ILLINOIS

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