With large-scale deployment of FPGAs in both private and public clouds in the past a few years, customizable computing is transitioning from advanced research into mainstream computing.
Although the performance and energy efficiency benefits of customizable computing have been clearly demonstrated, a significant challenge, however, is the efficent design and implementation of various accelerators on FPGAs. It presents a significant barrier to many software programmers, despite the recent
advance in high-level synthesis. In this talk, I shall first present our recent research on source-code level transformation and optimization for customizable computing, including support of high-level domain-specific languages (DSL) for deep learning (e.g. Cae), imaging processing (e.g. Halide), and big-data processing (e.g. Spark), and support of automated compilation to customized microarchictecture templates, such as systolic arrays, stencils, and CPPs (composable parallel and pipelined). Also, I shall discuss our recent eort on system-level support for embedding customizable accelerators into storage systems to achieve in-storage acceleration.
